Workshop: HiPar22: 3rd Workshop on Hierarchical Parallelism for Exascale Computing
Event TypeWorkshop
Registration Categories
W
Tags
Algorithms
Architectures
Compilers
Computational Science
Exascale Computing
Heterogeneous Systems
Hierarchical Parallelism
Memory Systems
Parallel Programming Languages and Models
Parallel Programming Systems
Resource Management and Scheduling
Session Formats
Recorded
TimeFriday, 18 November 20228:30am - 12pm CST
LocationC140-142
DescriptionIndustrial competition, the explosion of AI and machine learning, and the computational needs of leading-edge scientific research are driving rapid changes and advancements in High Performance Computing (HPC). Computational nodes are becoming increasingly more powerful, featuring a large number of physical cores in multiple sockets and accelerators. This increases the overall complexity, due to complex architectures (e.g., memory hierarchies and tens of compute elements), novel accelerator designs, and energy constraints. Hierarchical parallelism is an approach that is gaining momentum in HPC: it embraces the intrinsic complexity of current and future HPC systems, rather than avoiding it, by exploiting parallelism at all levels: compute, memory and network. Hierarchical parallelism is the focus of this workshop. We aim at bringing together hardware, application and software practitioners proposing new strategies to fully exploit computational hierarchies, and examples to illustrate their benefits for extreme scale computing.

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