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The International Conference for High Performance Computing, Networking, Storage, and Analysis

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Wide Quantum Circuit Optimization with Topology Aware Synthesis

Workshop: Third International Workshop on Quantum Computing Software

Authors: Mathias Weiden, Justin Kalloor, and John Kubiatowicz (University of California, Berkeley) and Ed Younis and Costin Iancu (Lawrence Berkeley National Laboratory (LBNL))

Abstract: Unitary synthesis is an optimization technique that can achieve optimal gate counts while mapping quantum circuits to restrictive qubit topologies. Synthesis algorithms are limited in scalability by their exponentially growing run times. Application to wide circuits requires partitioning into smaller components. In this work, we explore methods to reduce depth and multi-qubit gate count of wide, mapped quantum circuits using synthesis. We present TopAS, a topology aware synthesis tool that preconditions quantum circuits before mapping. Partitioned subcircuits are optimized and fitted to sparse subtopologies to balance the opposing demands of synthesis and mapping algorithms. Compared to state of the art wide circuit synthesis algorithms, TopAS is able to reduce depth on average by 35.2% and CNOT count by 11.5% for mesh topologies. Compared to the optimization and mapping algorithms of Qiskit and Tket, TopAS is able to reduce CNOT counts by 30.3% and depth by 38.2% on average.

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