Ronan Keryell is principal software engineer at Xilinx Research Labs working on high-level programming models for FPGA and is member of the Khronos OpenCL & SYCL C++ committee. Ronan Keryell received his MSc in Electrical Engineering and PhD in Computer Science from École Normale Supérieure of Paris (France), on the design of a massively parallel RISC-based VLIW-SIMD graphics computer and its programming environment. He was assistant professor in the Computer Science department at MINES Paris Tech and later at Télécom Bretagne (France), working on automatic parallelization, compilation of PGAS languages (High-Performance Fortran), high-level synthesis and co-design, networking, and secure computing. He was co-founder of 3 start-ups, mainly in the area of High Performance Computing, and was the technical lead of the Par4All automatic parallelizer at SILKAN, targeting OpenMP, CUDA & OpenCL from sequential C & Fortran. Before joining Xilinx, he worked at AMD on programming models for GPU.
Accelerator-based Architectures
Parallel Programming Languages and Models
Parallel Programming Systems
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