Presenter

Pierre-Axel Lagadec is senior hardware architect at Atos/Bull. He has worked on several custom ASICs projects for High Performance Computing. He developed strong skills on cache coherency protocols, high speed SerDes and memories interfaces. He is aware of techniques and methodology to achieve best performance (latency, bandwidth, power). He is in charge of the BXI (Bull Exascale Interconnect) Switch architecture, is involved in the RED-SEA European project (Technical Manager) and has been involved in the European Processor Initiative (Interconnect architecture). He also spent 8 years in Texas Instruments working on SoC developments for mobile application based on ARMs microprocessors and focusing on low-power.