Memory Heterogeneity in High Performance Computing
DescriptionMemory heterogeneity refers to the memory architecture with multiple memory components and those memory components have diverse characteristics (such as latency and bandwidth). It is common to see heterogeneous memory (HM) in supercomputers nowadays. With the emergence of processing-in-memory and resource disaggregation, there will be more memory components with increasingly different features (not only in terms of latency and bandwidth, but also in terms of computing capabilities and reliability).
Managing HM is challenging. The programmer often has to take care of memory allocation, decide data placement and migration, and make the best use of fast memory in HM. Memory heterogeneity also introduces complexity in programming models, and introduces new performance bugs because of bad usage of HM. As a result, the programming productivity of domain scientists is reduced. This panel will discuss how memory heterogeneity will impact the HPC ecosystem, including architectures, runtime systems, programming models and applications.
Managing HM is challenging. The programmer often has to take care of memory allocation, decide data placement and migration, and make the best use of fast memory in HM. Memory heterogeneity also introduces complexity in programming models, and introduces new performance bugs because of bad usage of HM. As a result, the programming productivity of domain scientists is reduced. This panel will discuss how memory heterogeneity will impact the HPC ecosystem, including architectures, runtime systems, programming models and applications.
Event Type
Panel
TimeTuesday, 15 November 20223:30pm - 5pm CST
LocationC147-148-154
TP
XO/EX
Heterogeneous Systems
Memory Systems
Recorded
Archive
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