Navigating the Perils of Ubiquitous Heterogeneity
DescriptionHeterogeneity is, and has long been, a defining characteristic of computing architectures. For example, the microarchitecture implementing an instruction set architecture (ISA) contains a diverse collection of function blocks such as instruction decoder, ALUs, memory controllers, page walk hardware, to name just a few. Even at the ISA level, heterogeneity is available in instructions to control specialized units such as SIMD or vector processors, bit matrix multiply, and crypto engines.

In the past, application developers were largely shielded from these forms of heterogeneity through ISA, compiler analysis, intrinsics, or high level pragmas. However as microelectronics approaches fundamental scaling limits in feature size and power, it has become increasingly necessary to provide and expose specialized circuits purpose-built, each to its narrow function. Thus, heterogeneity has become the new normal in the world of computing, affecting virtually all levels from IoT to supercomputer.

In this talk, I will discuss current and future heterogeneous architectures that we will have to exploit to achieve required performance levels. Approaches and tools to make these complex resources accessible will be reviewed. Scalability challenges and the tension between portability and performance will be discussed.
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TimeMonday, 14 November 202210:30am - 11:10am CST
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