HPC Architecture and Performance Engineer
Lawrence Berkeley National Laboratory
Berkeley, CA 94720
DescriptionHPC Architecture and Performance Engineer - 95713
Division: NE-NERSC

Lawrence Berkeley National Lab’s (LBNL, https://www.lbl.gov/) NERSC Division has an opening for a HPC Architecture and Performance Engineer (Remote Friendly) to join the team.

The purpose of the position is to contribute to an on-going ATG group effort to develop a complete understanding of the issues that lead to improved application and computer system performance on extreme-scale advanced architectures. In this exciting role, you will contribute to efforts for NERSC in evaluating existing and emerging High Performance Computing (HPC) systems by analyzing the performance characteristics of leading-edge DOE Office of Science application codes. This position requires knowledge of computer architecture & technology trends and their implications for NERSC users.

What You Will Do:
• Assess emerging technologies in architecture, algorithms, parallel programming paradigms and languages to provide input for HPC system procurements and DOE technology roadmaps.
• Evaluate hardware and software technologies in emerging areas, such as cloud computing and AI, for their potential to be applied to HPC.
• Work with vendors to prioritize, develop and enhance their technologies in order to better meet the needs of DOE Office of Science application codes and workflows.
• Measure and understand the performance and scalability of key scientific applications or workflows that comprise NERSC's evolving workload on current and future high-performance computing (HPC) and data intensive platforms.
• Develop techniques to assess the needs of the DOE workload in aggregate. Work to understand potential trade-offs and to match specific technologies to specific classes of applications as needed.
• Prepare timely reports, papers, and lectures describing significant results for dissemination within NERSC and throughout the broader HPC research community.
• Contribute performance-related expertise to cross-team NERSC activities that may involve application performance tuning, workflow optimization, interconnects, storage I/O, and/or data analysis functions.
• Participate in extrapolation of technology trends over the next decade of HPC platforms.
• Participate in the NERSC selection process for acquisition of next-generation HPC systems.
• Take a lead role in one or more of the activities described above.

Additional Responsibilities as needed:
• Provide technical conceptual guidance to other group members and management, suggest directions for investigation, create new opportunities for NERSC, serve as a principal collaborator on major projects, and be responsible for fostering broader community-wide efforts with organizations outside of NERSC and Berkeley Lab.

Want to learn more about Berkeley Lab's Culture, Benefits and answers to FAQs?
Please visit: https://recruiting.lbl.gov/

• This is a full-time, career appointment, exempt (monthly paid) from overtime pay.
• This position will be hired at a level commensurate with the business needs and the skills, knowledge, and abilities of the successful candidate.
• This position may be subject to a background check. Any convictions will be evaluated to determine if they directly relate to the responsibilities and requirements of the position. Having a conviction history will not automatically disqualify an applicant from being considered for employment.
• Work may be performed on-site, hybrid, full-time telework or remote modes.

How To Apply
Apply directly online at and follow the on-line instructions to complete the application process.

Based on University of California Policy - SARS-CoV-2 (COVID-19) Vaccination Program and U.S Federal Government requirements, Berkeley Lab requires that all members of our community obtain the COVID-19 vaccine as soon as they are eligible. As a condition of employment at Berkeley Lab, all Covered Individuals must Participate in the COVID-19 Vaccination Program by providing proof of Full Vaccination or submitting a request for Exception or Deferral. Visit covid.lbl.gov (https://covid.lbl.gov/) for more information.

Berkeley Lab is committed to Inclusion, Diversity, Equity and Accountability (IDEA, https://diversity.lbl.gov/ideaberkeleylab/) and strives to continue building community with these shared values and commitments. Berkeley Lab is an Equal Opportunity and Affirmative Action Employer. We heartily welcome applications from women, minorities, veterans, and all who would contribute to the Lab's mission of leading scientific discovery, inclusion, and professionalism. In support of our diverse global community, all qualified applicants will be considered for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, age, or protected veteran status.

Equal Opportunity and IDEA Information Links:
Know your rights, click here (https://www.dol.gov/agencies/ofccp/posters) for the supplement: Equal Employment Opportunity is the Law and the Pay Transparency Nondiscrimination Provision (https://www.dol.gov/sites/dolgov/files/ofccp/pdf/pay-transp_%20English_formattedESQA508c.pdf) under 41 CFR 60-1.4.
RequirementsWhat is Required: • Bachelor of Science degree in Computer Science, Computational Science, Computer Architecture, Physical or Biological sciences or equivalent experience and a minimum of eight years’ experience in HPC. • Experience in benchmarking, code instrumentation, and performance analysis of parallel applications & workflows with emphasis on emerging architectures. Experience with performance profiling tools, hardware performance counters and/or code instrumentation systems. • Proven record of working effectively in a team, seeing projects through to completion, meeting deadlines, interacting with users, and thorough documentation of contributions. • Experience with computer architecture trends and their application to High Performance Computing (HPC). • Detailed understanding of state-of-the-art tools used to program, profile, and debug parallel scientific applications & workflows. (Such as MPI, PGAS, OpenMP, and hybrid-parallel codes using C, C++, Python, and Fortran code.) • A demonstrated ability to lead technical efforts in a team environment. • Demonstrated track record of research and technical publications. Ability to write and present technical papers at conferences and other venues to disseminate research work. • Excellent written and oral communication skills. Desired Qualifications: • Bachelor of Science degree in Computer Science, Computational Science, Computer Architecture or equivalent experience and a minimum of twelve years’ experience in hardware and/or software development for HPC systems and/or technologies. • Nationally and or internationally recognized expertise in an HPC related discipline. • Experience with hardware and software technologies in emerging areas, such as cloud computing and AI, and their application to HPC. • Demonstrated a detailed understanding of HPC computer architecture technologies including CPU, memory, interconnect, parallel I/O and/or networking.
Event Type
Job Posting
TimeWednesday, 16 November 202210am - 3pm CST
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