Introducing CXL 3.0 for Increased Scale and Optimized Resource Utilization and CXL Technology Demos
DescriptionCompute Express Link™ (CXL™) maintains memory coherency between the CPU memory space and memory on CXL attached devices. This enables fine-grained resource sharing for higher performance with heterogeneous processing, memory disaggregation, memory pooling, persistent memory, and emerging memory media. Last year at SC’21, CXL Consortium members showcased the first public demonstrations of CXL, proving to the industry that CXL’s vision to enable a new ecosystem of high-performance, heterogeneous computing is now a reality. There were also multi-vendor demos to illustrate interoperability between vendor solutions.
This year, the CXL Consortium released the CXL 3.0 specification to the public. CXL 3.0 builds on previous technology generations to increase scalability and optimize system level flows with advanced switching and fabric capabilities. In addition to doubling the data rate to 64GTs with no added latency over CXL 2.0, CXL 3.0 introduces fabric capabilities and management, improved memory sharing and pooling, enhanced coherency, efficient peer-to-peer communications, and fine-grained resource sharing across multiple compute domains.
With the completion of the first CXL Consortium Pre-FYI compliance event, CXL products are even closer to market release. In the CXL Consortium booth, member companies will be showcasing their CXL solutions, multi-vendor demos, and proof-of-concepts that will highlight use cases in the industry that will benefit from CXL’s high speed, low latency, and cache coherent interconnect.
TimeWednesday, 16 November 202211am - 11:30am CST